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Re: Theory Question 4

Re: Theory Question 4

From: Jeremy Meisel <j-meisel_at_avoiding.spam>
Date: Mon Apr 21 2008 - 22:41:05 CDT
('binary' encoding is not supported, stored as-is) I understood it to mean create a schematic using only two-input gates that would accomplish the
same thing as Y(i1 i2 i3) if you had one gate with three inputs.


==============Original message text===============
On Mon, 21 Apr 2008 1:32:47 am CDT "Jared Jenkins" wrote:

Can someone clarify what the "only two-input Y s" means in this question?

Jared Michael Jenkins
Northwestern University
McCormick School of Engineering and Applied Science
Web Development and IT Support Services
Mobile: 949.290.3737
===========End of original message text===========
Received on Mon Apr 21 22:41:05 2008

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