EECS 203 Mailing List
Re: HW question


Re: HW question

From: Maureen Gilmour <maureengilmour2007_at_avoiding.spam>
Date: Tue Apr 29 2008 - 14:11:19 CDT

I believe the question is are we supposed to limit the number of inputs in
total, as in the number of lines coming out of the MUX and going into the
OR/NOR gates, or are we supposed to minimize the inputs on the OR/NOR gates,
choosing a 2 input over a 3 input where possible.

On 4/29/08, Robert Dick <dickrp@northwestern.edu> wrote:
>
> Hyerim Shin:
>
> > For number 13, can we use 3 input OR/ NOR gate?
>
>
> "DMUX Logic: Use an 8:1 DMUX and OR/NOR gates to implement the following
> functions. Try to use as few inputs on your OR/NOR gates as possible."
>
> Where is that ambiguous? I must not understand the question.
>
>
> -Robert Dick-
>
>
Received on Tue Apr 29 14:11:19 2008

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