EECS 203 Mailing List
RE: Decoder

RE: Decoder

From: Daniel Myers <danielmyers2007_at_avoiding.spam>
Date: Sun Apr 20 2008 - 16:58:29 CDT

For for lab 3 I have everything done and working except I haven't put in an error injector. My understanding at this point is that some of the switches on the dip could be used to introduce a high value post encoder on one or multiple wires. I am a little bit confused as to how to go about this....The only way I have figured out how to get this to work is to use the LEDs as not just indicators but as Diodes so that introducing the high after the LEDs will only be indicated on the error detector circuit. Then there will be a difference between the error detector and the parity generator. I was thinking that I should also be able to do this with the use of gates however I don't know what will happen if I introduce a high value on the output end of a gate....will it destroy the gate?


Date: Mon, 14 Apr 2008 05:34:19 +0800
Subject: Re: Decoder

I used two input ANDs for 4 of my outputs and a three input and for my last one. I believe you can do so because there are two combinations of JKL which are not used/cannot be generated. I'm not too sure if I'm right though. -Kenny

  On 4/14/08, Hyerim Shin <> wrote: For my decoder, I have outputs of H,C,P,S,D with some combination of JKL. When I drew the circuit diagram, I needed 6 two input AND gate, 1 three input And gate, and 3 inverters. Is there a method I can simplify this to four two input AND, One three input And, three inverters as given in the lab handout? I am confused how to simplifiy this because I cannot combine the outputs. Thank you Hyerim

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Received on Sun Apr 20 16:58:29 2008

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