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Re: Decoder

Re: Decoder

From: Kenny Tay <kennytay2007_at_avoiding.spam>
Date: Sun Apr 13 2008 - 16:34:19 CDT

I used two input ANDs for 4 of my outputs and a three input and for my last
one. I believe you can do so because there are two combinations of JKL which
are not used/cannot be generated. I'm not too sure if I'm right though.

On 4/14/08, Hyerim Shin <> wrote:
> For my decoder, I have outputs of H,C,P,S,D with some combination of JKL.
> When I drew the circuit diagram, I needed 6 two input AND gate, 1 three
> input And gate, and 3 inverters.
> Is there a method I can simplify this to four two input AND, One three
> input And, three inverters as given in the lab handout? I am confused how to
> simplifiy this because I cannot combine the outputs.
> Thank you
> Hyerim
Received on Sun Apr 13 16:34:19 2008

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