EECS 203 Mailing List


From: Jeremy Meisel <j-meisel_at_avoiding.spam>
Date: Thu May 29 2008 - 02:11:20 CDT
('binary' encoding is not supported, stored as-is) Dear David,

I was wondering if you could clarify what you said in class today about the MHz, clock cycles and
how they relate to instruction speed. You said that a clock cycle lasts 1/MHz us. So that, for
example, if the processor is clocked at 2 MHz that means it's clock cycle lasts .5 us and if it did
one instruction per clock cycle that would be an instruction every .5us. In the button.asm loop
code it seems to imply that a 2 MHz processor will take 2 us to execute a line of code thus a five
line wait loop takes 10 us to execute. This seems to imply a different relationship than
reciprocal between the MHz and clock cycle length. If you could explain this that would be great.


Jeremy Meisel
Received on Thu May 29 02:11:20 2008

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