邱翔:
> Prof. Dick:
>
> Our group is interested in the area "low power and power-aware design".
> However, perhaps this topic is still too big for a two-weeks project. Can
> you give us some suggestions to narrow the scope? Thank you very much.

Yes. I will give you a couple of possible directions in low-power and
power-aware design. You are welcome to propose another idea, too.

1) Check out the CODES-ISSS pre-print by Kim, Dick, and
Joseph on the course website. That won't work very well if the processor
needs 1 V and the batteries put out 3 V most of the time. You study battery
technologies to determine whether there are promising low-voltage
technologies that can be used when processor voltages drop farther.

2) Check out the IPSN-SPOTS paper by Jevtic, Kotowsky, Dick, Dinda, and
Dowding. That is a _really_ simple idea. What if the events you want to
detect are more complex than a threshold crossing? Could one build a very
low-power finite state machine to detect more interesting events?

3) Check out the DATE paper by Liu, Dick, Shang, and Yang. It works, but what
will happen in the presence of process variation? You could determine the
impact of process variation on this power estimation technique.

4) Check out the CA Letters paper by Mallik, Lin, Memik, Dinda, and Dick. Are
there other ways to predict or sense the level of user satisfaction in order
to minimize power consumption?

-Robert Dick-
Received on Tue Aug 21 20:46:20 2007